Edited by Chance Lai
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A team of four graduate students from National Yang Ming Chiao Tung University (NYCU) has won the global championship at the 2026 IEEE Reconfigurable Computing Challenge (RCC), outperforming teams from leading universities including Cornell University, Carnegie Mellon University, the University of California, San Diego, and Peking University.

Competing at the challenge held alongside the IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM) in Atlanta, Georgia, the students developed an FPGA-based accelerator that significantly improves the efficiency of real-time 3D scene reconstruction and rendering—an increasingly important technology for applications ranging from augmented and virtual reality to autonomous driving and robotics.

Advancing Real-Time 3D Computing

The championship team—Kuan-Wei Lai, Yi-Chen Hu, Wei-Chien Cheng, and Chia-Yu Kuo—from NYCU’s Institute of Electronics was advised by Assistant Professor Yi-Chung Wu of the Integrated Circuits and Intelligent Systems Laboratory.

Their award-winning project, “A High-Throughput FPGA Accelerator for Real-Time Sort-Free 3D Gaussian Splatting,” addresses a major computational bottleneck in modern 3D scene reconstruction.

3D Gaussian Splatting (3DGS) has emerged as one of the most promising techniques for generating highly realistic 3D scenes. However, achieving real-time performance requires processing enormous volumes of data while handling computationally intensive operations, particularly depth sorting, which often limits overall system performance.

To overcome this challenge, the NYCU team jointly optimized both the underlying algorithm and the hardware architecture. By redesigning the dataflow and computation pipeline, they eliminated the need for depth sorting, enabling a highly efficient FPGA accelerator that substantially increases processing throughput and reduces system latency.

Building a Complete System from the Ground Up

Team leader Kuan-Wei Lai said the project took nearly a year to complete, with every stage—from algorithm design and hardware architecture to FPGA implementation and system integration—developed entirely by the student team.

“The greatest challenge wasn’t designing a single algorithm or circuit,” Lai said. “It was integrating algorithms, hardware, software, and the FPGA platform into a complete system capable of operating reliably under limited hardware resources.”

The team spent months refining and validating the design through continuous debugging and testing. Even in the days leading up to the international finals, members continued to optimize system performance and rehearse demonstrations to ensure the platform would perform reliably under competition conditions.